Analog Design Engineer - SERDES, United Kingdom
Analog Design Engineer - SERDES, United Kingdom
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United Kingdom, United Kingdom
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Posted: less than a month ago
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Description
At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and unusually hardworking IC Designer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single day.
In this role, you will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO) with best in class power, performance, and area (PPA). \n\nYou will work with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create block-level specifications and execute on transistor-level implementation and behavioral modelling. You will drive mask design to implement layout view of designs. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these sophisticated IPs, on regular basis you will interact with your peers/management to communicate progress and discuss new ideas making it a lively and interactive work environment.
The ideal candidate should have deep understanding of analog mixed-signal design with experience in high-speed serial links.\nSolid understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters\nSolid understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques\nGood grasp and understanding of digitally assisted analog design concepts (e.g. background calibrations, LMS-based adaptive loops)\nExperience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts\nKnowledge of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 20+ Gbps NRZ and PAM applications\nKnowledge of CDR architectures and implementations\nKnowledge of lab equipments and testing\nExperience in Analog Mixed Signal circuit modelling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)\nHands-on experience in advanced CMOS technologies, design with FinFet technology\nHands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization\nExperience in the following areas is a plus\nConcepts of timing closure and related industry tools (e.g., Nanotime, Primetime)\nExperience in lab testing of high-speed serial I/O, debug and data analysis techniques\nKnowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY)\nSkills in scripting and automation to enhance efficiency are highly desirable\nProficiency in English language is required
PhD/master's degree in Electric Engineering or relevant experience\nApple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
In this role, you will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO) with best in class power, performance, and area (PPA). \n\nYou will work with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create block-level specifications and execute on transistor-level implementation and behavioral modelling. You will drive mask design to implement layout view of designs. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these sophisticated IPs, on regular basis you will interact with your peers/management to communicate progress and discuss new ideas making it a lively and interactive work environment.
The ideal candidate should have deep understanding of analog mixed-signal design with experience in high-speed serial links.\nSolid understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters\nSolid understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques\nGood grasp and understanding of digitally assisted analog design concepts (e.g. background calibrations, LMS-based adaptive loops)\nExperience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts\nKnowledge of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 20+ Gbps NRZ and PAM applications\nKnowledge of CDR architectures and implementations\nKnowledge of lab equipments and testing\nExperience in Analog Mixed Signal circuit modelling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)\nHands-on experience in advanced CMOS technologies, design with FinFet technology\nHands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization\nExperience in the following areas is a plus\nConcepts of timing closure and related industry tools (e.g., Nanotime, Primetime)\nExperience in lab testing of high-speed serial I/O, debug and data analysis techniques\nKnowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY)\nSkills in scripting and automation to enhance efficiency are highly desirable\nProficiency in English language is required
PhD/master's degree in Electric Engineering or relevant experience\nApple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
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Job positionAnalog Design Engineer - SERDES
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